1. Field of the Invention
The present invention relates to a watch dog timer which is the art for detecting a program runaway of a system using a microcomputer or the like.
2. Description of the Related Art
The block diagram of FIG. 1 shows a general configuration of a conventional watch dog timer.
In FIG. 1, reference numeral 151 designates a counter. The clock .phi. given from an input terminal 152 are counted as a count source, and when the count value reaches a predetermined value, an overflow signal OVF is outputted from an input terminal 153.
Reference numeral 154 designates a clear terminal of the counter 151 to which a clear signal CLR is given. When supplied with the clear signal CLR, the counter 151 clears the own count value to "0".
Reference numeral 155 designates a 3-input OR gate. A reset signal RESET is given to the first input from the input terminal 156, a clear request signal CLRREQ to the second input from the input terminal 157, and the above-mentioned overflow signal OVF to the third input. As a result, when the OR gate 155 is supplied with any one of the reset signal RESET, the clear request signal CLRREQ or the overflow signal OVF, the clear terminal 154 of the counter 151 is inputted with the clear signal CLR thereby to clear the count value of the counter 151.
The operation of this conventional watch dog timer is described below.
In the case where whether a CPU such as a microcomputer is running away or not is to be judged, the program is constructed in such a manner as to generate a clear request signal CLRREQ within a predetermined period of time. By constructing the program in this way, while the CPU is normally operating, the clear request signal CLRREQ generated within a predetermined period clears the counter 151, so that the counter 151 is cleared before its count value teaches a predetermined value, thereby preventing the overflow signal OVF from being generated.
Now, assume that a runaway has occurred. The CPU is no longer able to generate a clear request signal CLRREQ according to the program, and therefore the count value of the counter 151 reaches a predetermined value to generate an overflow signal OVF. By detecting the generation of this overflow signal OVF, whether a runaway has occurred or not can be judged.
Also, in the case where two CPUs are used for mutual monitoring or the like, a clear request signal CLRREQ can be given from one of the two CPUs to use the overflow signal OVF as a control signal for the remaining CPU.
Further, in the case where a plurality of programs are run concurrently by the use of two CPUs, a clear request signal CLRREQ is generated by the same procedure from the two CPUs to generate an overflow signal OVF.
The conventional watch dog timer is constructed as described above. Therefore, the detection is limited to a long period over a counting period when no clock is generated, and such an operation as to monitor the program execution individually or over a short period is impossible.
Also, in the case where CPUs are mutually monitored in a multiprocessor system, no more than the period of the waveform generated by the monitored CPU can be detected, and the operation of pulse width monitoring is impossible. Although such a problem can be solved by providing a plurality of watch dog timers or counters, for example, a new problem of an increased circuit size arises.